/*
 * The PIC32 panel's instruction-count demo: RG6 toggled by a loop whose length is known, so the
 * pin's rate follows from the instruction count alone. Entered through -kernel with no reset
 * code of its own (the machine jumps to the entry, as after a chipKIT bootloader).
 *
 * Each half period is one store to LATGINV, 125 NOPs, the branch and its delay slot: 128
 * instructions. Under -icount shift=4 every instruction is 16 ns, so a period is 256 x 16 ns =
 * 4096 ns: 244140.625 Hz, duty exactly 50 % (both halves are the same instructions).
 *
 * SPDX-License-Identifier: Apache-2.0
 */
        .set noreorder
        .set noat
        .text
        .globl _start
_start:
        li      $t0, 0xBF886184         /* TRISGCLR */
        li      $t1, 1 << 6
        sw      $t1, 0($t0)             /* RG6 an output */
        li      $t0, 0xBF8861AC         /* LATGINV */
1:      sw      $t1, 0($t0)
        .rept   125
        nop
        .endr
        b       1b
        nop