wai-quantum 0.5.0: provenance, sampling members, device programs, OpenCL, a simulated FPGA, f64 on accelerators, and QPU clients #253

Merged
dcharlot merged 5 commits from wai/quantum-0.5.0 into main 2026-10-15 01:08:33 -04:00
Owner

What

wai-quantum 0.5.0, and a new crate, wai-quantum-qpu 0.1.0. The changelog entry in wai/CHANGELOG.md lists everything; in short:

  • Provenance in the certificate. Every certificate says whether it was earned on silicon, under an emulator or in a simulator. A silicon certificate hashes exactly as before, so every pinned digest is unchanged; placement ranks silicon first. Breaking: Certificate gains a public field, hence 0.5.0.
  • Sampling members: the sample kernels, Sampler, statistical certification on the qpu-v1 corpus, a virtual QPU, and a virtual device that compiles each circuit for its coupling map and native basis and charges noise for the program it would run.
  • Programs for devices: OpenQASM 2/3 in standard gates only, every multi-controlled gate lowered exactly (refused, never rounded, past the dyadic table); a native compiler for rz/sx/x/cz, prx/cz and gpi/gpi2/zz (angles in turns), routed over a coupling map; every program verified against its circuit by simulation.
  • The OpenCL member (quantum_fabric_opencl).
  • The FPGA member, simulated (quantum_fabric_fpga): a Verilog datapath, each 32×32 product from four 16-bit partial products, compiled at run time by Verilator.
  • The dense f64 state vector on accelerators (quantum_fabric::sv64, with quantum_sv): the CPU's own launches, each an IEEE binary64 operation with no fused multiply-add, on CUDA and on OpenCL devices with binary64.
  • wai-quantum-qpu: clients for three quantum processing protocols, QpuSampler, and the wai-qpu command (device, bit-order probe, certification).

Verified before the push

On the build host (macOS, M4 Max):

  • cargo test --release --features full: every test passes; the default, no-default, wasm32 and wasip2 builds; the f64 planner and replay against the CPU, bit for bit, with the pinned digest; every dependent crate (wai-rs, wai-pack, wai-quantum-serve, wai-web for wasm32, quantum-meter, quantum-wgsl-check) checks against its lockfile.
  • The OpenCL member on the platform GPU (OpenCL 1.2): all four pinned digests, every kernel mutant caught; the f64 state vector refused there, the GPU having no binary64.
  • The simulated FPGA member: all four pinned digests, every datapath mutant caught; Yosys elaborates the datapath with no latch.
  • wai-quantum-qpu: every client against a service that follows its protocol's published contract; planted defects in bit order, key order, phase sign and angle unit each fail the tests.

On the hardware host (x86_64 Linux):

  • The OpenCL member on the discrete GPU, the integrated GPU and the CPU runtime: all four pinned digests and every mutant caught on each.
  • The f64 state vector on the discrete GPU through CUDA and through OpenCL, and on the CPU runtime through OpenCL: the pinned digest, 16 and 20 qubits matching the CPU bit for bit, every mutant caught.

Clippy reports no warning or error in the code this change adds. With every feature on, it reports seven errors in repro.rs and quantum_spd.rs, untouched here and present on main.

After the merge

The hardware host's jobs now read their device lists from the host (WAI_QUANTUM_HW_WEBGPU_EXPECT, WAI_QUANTUM_HW_OPENCL_EXPECT), defaulting to today's. Once this merges, the host gains the integrated GPU in one step: the declarations in its runner environment, render-node access for the runner's user, and a runner restart.

🤖 Generated with Claude Code

## What wai-quantum **0.5.0**, and a new crate, **wai-quantum-qpu 0.1.0**. The changelog entry in `wai/CHANGELOG.md` lists everything; in short: - **Provenance in the certificate.** Every certificate says whether it was earned on silicon, under an emulator or in a simulator. A silicon certificate hashes exactly as before, so every pinned digest is unchanged; placement ranks silicon first. Breaking: `Certificate` gains a public field, hence 0.5.0. - **Sampling members**: the sample kernels, `Sampler`, statistical certification on the `qpu-v1` corpus, a virtual QPU, and a virtual device that compiles each circuit for its coupling map and native basis and charges noise for the program it would run. - **Programs for devices**: OpenQASM 2/3 in standard gates only, every multi-controlled gate lowered exactly (refused, never rounded, past the dyadic table); a native compiler for `rz`/`sx`/`x`/`cz`, `prx`/`cz` and `gpi`/`gpi2`/`zz` (angles in turns), routed over a coupling map; every program verified against its circuit by simulation. - **The OpenCL member** (`quantum_fabric_opencl`). - **The FPGA member, simulated** (`quantum_fabric_fpga`): a Verilog datapath, each 32×32 product from four 16-bit partial products, compiled at run time by Verilator. - **The dense f64 state vector on accelerators** (`quantum_fabric::sv64`, with `quantum_sv`): the CPU's own launches, each an IEEE binary64 operation with no fused multiply-add, on CUDA and on OpenCL devices with binary64. - **wai-quantum-qpu**: clients for three quantum processing protocols, `QpuSampler`, and the `wai-qpu` command (device, bit-order probe, certification). ## Verified before the push On the build host (macOS, M4 Max): - `cargo test --release --features full`: every test passes; the default, no-default, wasm32 and wasip2 builds; the f64 planner and replay against the CPU, bit for bit, with the pinned digest; every dependent crate (`wai-rs`, `wai-pack`, `wai-quantum-serve`, `wai-web` for wasm32, `quantum-meter`, `quantum-wgsl-check`) checks against its lockfile. - The OpenCL member on the platform GPU (OpenCL 1.2): all four pinned digests, every kernel mutant caught; the f64 state vector refused there, the GPU having no binary64. - The simulated FPGA member: all four pinned digests, every datapath mutant caught; Yosys elaborates the datapath with no latch. - wai-quantum-qpu: every client against a service that follows its protocol's published contract; planted defects in bit order, key order, phase sign and angle unit each fail the tests. On the hardware host (x86_64 Linux): - The OpenCL member on the discrete GPU, the integrated GPU and the CPU runtime: all four pinned digests and every mutant caught on each. - The f64 state vector on the discrete GPU through CUDA and through OpenCL, and on the CPU runtime through OpenCL: the pinned digest, 16 and 20 qubits matching the CPU bit for bit, every mutant caught. Clippy reports no warning or error in the code this change adds. With every feature on, it reports seven errors in `repro.rs` and `quantum_spd.rs`, untouched here and present on main. ## After the merge The hardware host's jobs now read their device lists from the host (`WAI_QUANTUM_HW_WEBGPU_EXPECT`, `WAI_QUANTUM_HW_OPENCL_EXPECT`), defaulting to today's. Once this merges, the host gains the integrated GPU in one step: the declarations in its runner environment, render-node access for the runner's user, and a runner restart. 🤖 Generated with [Claude Code](https://claude.com/claude-code)
wai-quantum 0.5.0: provenance, sampling members, device programs, OpenCL, a simulated FPGA, f64 on accelerators, and QPU clients
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157dcb1cc5
Breaking: Certificate gains a public field, provenance; a silicon
certificate hashes exactly as before, and every pinned digest is unchanged.
quantum_fabric now includes quantum_toolchain.

- Provenance (silicon / emulator / simulator) inside the certificate hash;
  placement ranks silicon first.
- Sampling members: the sample kernels, the Sampler trait, statistical
  certification on the qpu-v1 corpus, a virtual QPU, and a virtual device
  that compiles each circuit for its coupling map and native basis.
- quantum_toolchain::device: OpenQASM 2/3 in standard gates only, multi-
  controlled gates lowered exactly, every qubit measured; counts read back.
  quantum_toolchain::native: rz/sx/x/cz, prx/cz and gpi/gpi2/zz (turns), routed
  over a coupling map and verified against the circuit by simulation.
  from_qasm reads ch.
- The OpenCL member (quantum_fabric_opencl), bit-exact on GPUs and CPUs.
- The FPGA member, simulated (quantum_fabric_fpga): a Verilog datapath
  compiled by Verilator at run time; certificates say simulator.
- The dense f64 state vector on accelerators (quantum_fabric::sv64): the
  CPU's own launches with no fused multiply-add, on CUDA and on OpenCL devices
  with binary64, certified against a pinned digest.
- wai-quantum-qpu 0.1.0: clients for three quantum processing protocols, the
  wai-qpu command, curl transport with secrets off command lines.
- CI: OpenCL, FPGA and QPU-client workflows; the CUDA and OpenCL hardware jobs
  certify the f64 state vector; the hardware host declares its devices.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
The changelog keeps both new entries.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
ci: the wai-quantum member workflows run only when the pull request's own diff touches them
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workflow's paths, and every other job waits on it.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
wai-quantum 0.5.0: FabricClass is non-exhaustive
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f1c254ba3a
A class can then be added in a minor release without breaking an
exhaustive match downstream. Found in review.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
Merge main into wai/quantum-0.5.0
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d1c9d8b554
The changelog keeps every new entry. Main's current C header comes with
it, so the HTTP corpus's falsification legs find a clean tree again.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
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