### `wai-ops/1-npu` on a neural processor, and where its arithmetic is not exact

- **`wai/wai-ops-npu`**, an operator implementation of `wai-ops/1-npu` (integer-operators §9.2) for neural processors: a kernel for one compute core of a tile array, built at run time with the array's open toolchain, with a host side built against the device runtime. The interpreter runs each graph and asks the core for every operator that computes values:
  - `conv` and `conv_transpose` as sums over taps, into 32-bit accumulator lanes for operands that fit 8 or 16 bits and 64-bit lanes for 32-bit operands, the width the certificate's `mac` record allows;
  - `rescale`, `chscale` and `mul` through the vector unit's multiply and shift-round step, under the mode that is the operator's rounding;
  - the elementwise operators, and `lut16` a table block at a time.

  The plan, the checks, the range policies, the movement operators and the state stay the interpreter's, so the device adds no refusal.
- **Measured: where the unit is not exact.** The unit's shift-round step is `R_floor`, `R_half_up` and `R_half_even` (§2) under three of its modes, at shifts 0 to 59 only. At 60 to 63 every mode shifts left by `64 − s`. 36 vectors of the subset have such a shift, and the kernel forms those in the core's scalar unit. A 32-bit accumulator lane keeps the low 32 bits of a sum past i32. 110 of the 458 graphs that fail the subset by `acc32` alone gave other results on the device. Integer-operators §9.5 has the table, with time and energy, each energy reading named by class: the package counter is `OnChipCounter` (energy-measurement §2; its scope is the whole package), the runtime's own estimate is `ModelBased`. No speed or energy claim is made: the device path is bound by its dispatches.
- **Results by neural processor (§9.5):** on PCI 0x1022:0x17f0, every graph vector in the subset gave the committed result and the interpreter's: 733 vectors, 1,005 decodes. Every one of twelve kernel edits was caught by the corpus. No other neural processor was run.
- **The Web Neural Network API (§9.5):** a per-operator account from its Candidate Recommendation Draft of 21 October 2026. Its convolution, matrix and quantize operators are floating point, so the subset is exact there only when built from its `"int32"` element-wise operations and reductions; a multiplier needs `"int64"`, which the draft allows but does not require. No browser leg was run.
- **`ops-conformance/npu.jsonl` (§14.5):** each graph vector's place in the subset, from its graph's own verdict. The generator writes it and the independent checker writes it again, and both must give the committed bytes. The device test runs exactly the vectors it lists.
- **determinism-tiers §5 and §6** record the device run. No decoder runs its graphs on a neural processor yet, so the tier is not claimed for a decode there.
- **CI:** `wai-ops-npu.yml` runs the probes, the corpus, the kernel edits and the width test on the `linux-amd` runner's device, which must be present. On `linux-arm64` it requires that the device tests skip without `WAI_OPS_NPU_REQUIRE` and fail with it.

