c2db9d17d1
The processor's master and high-performance ports boot at 128 bits and loading a bitstream does not change them, so the AXI build meets them with width converters and writes no processor register; ps-ports reads them, and the host touches no AXI address if they differ. The registers move to M_AXI_HPM0_FPD at 0xA000_0000, a port designs on this board have already used. A write master sends a batch's results to DDR, a page at a time, and the testbench checks every word it writes. Writes are now timed to their response. The class campaign's logs are added. Co-Authored-By: Claude Opus 5.5 <[email protected]>
505 lines
10 KiB
Text
505 lines
10 KiB
Text
# class t0-idle cores 1
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# wai-quantum-fpga meter passes=8 settle=60s samples=30 null=false sensor=/sys/class/hwmon/hwmon2/power1_input started=SystemTime { tv_sec: 1793974380, tv_nsec: 248171637 }
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# pass state sample power_uW
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1 run 1 3130000
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1 run 2 3140000
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1 run 3 3130000
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1 run 4 3140000
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1 run 5 3140000
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1 run 14 3140000
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1 run 15 3150000
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1 run 19 3140000
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1 run 20 3150000
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1 run 21 3140000
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1 run 22 3160000
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1 run 23 3140000
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1 run 24 3150000
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1 run 25 3150000
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1 run 26 3150000
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1 run 27 3150000
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1 run 28 3140000
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1 run 29 3140000
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1 run 30 3150000
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# point pass=1 state=run jobs_per_s=33332655.7 updates_per_s=0.0 clock_hz=99997945
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1 halt 1 3130000
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# point pass=1 state=halt jobs_per_s=0.0 updates_per_s=0.0 clock_hz=99997945
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2 halt 1 3140000
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# point pass=2 state=halt jobs_per_s=0.0 updates_per_s=0.0 clock_hz=99997945
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2 run 1 3120000
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2 run 30 3150000
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# point pass=2 state=run jobs_per_s=33332686.8 updates_per_s=0.0 clock_hz=99998037
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3 run 1 3140000
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# point pass=3 state=run jobs_per_s=33332682.8 updates_per_s=0.0 clock_hz=99998024
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# point pass=3 state=halt jobs_per_s=0.0 updates_per_s=0.0 clock_hz=99998013
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4 run 1 3120000
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# point pass=4 state=run jobs_per_s=33332675.3 updates_per_s=0.0 clock_hz=99998003
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4 halt 1 3130000
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# point pass=4 state=halt jobs_per_s=0.0 updates_per_s=0.0 clock_hz=99997996
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5 halt 1 3140000
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# point pass=5 state=halt jobs_per_s=0.0 updates_per_s=0.0 clock_hz=99997989
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5 run 1 3150000
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5 run 2 3150000
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5 run 3 3150000
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5 run 4 3140000
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# point pass=5 state=run jobs_per_s=33332668.6 updates_per_s=0.0 clock_hz=99997984
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6 halt 1 3140000
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# point pass=6 state=halt jobs_per_s=0.0 updates_per_s=0.0 clock_hz=99997979
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6 run 1 3140000
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6 run 19 3160000
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6 run 20 3150000
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6 run 21 3130000
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6 run 22 3140000
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6 run 23 3140000
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6 run 24 3140000
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6 run 30 3120000
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# point pass=6 state=run jobs_per_s=33332666.1 updates_per_s=0.0 clock_hz=99997975
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7 run 1 3140000
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7 run 2 3130000
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7 run 3 3150000
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7 run 4 3140000
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7 run 7 3140000
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7 run 8 3150000
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# point pass=7 state=run jobs_per_s=33332665.0 updates_per_s=0.0 clock_hz=99997972
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# point pass=7 state=halt jobs_per_s=0.0 updates_per_s=0.0 clock_hz=99997971
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8 run 1 3150000
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# point pass=8 state=run jobs_per_s=33332663.2 updates_per_s=0.0 clock_hz=99997967
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8 halt 1 3130000
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# point pass=8 state=halt jobs_per_s=0.0 updates_per_s=0.0 clock_hz=99997966
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# done SystemTime { tv_sec: 1793975821, tv_nsec: 177880976 }
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# passes used 8 of 8 (dropped: [])
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# run - halt = 1.9 +/- 4.0 mW (per-pass sd 11.3); 4/8 passes positive; 3 sample excursions beyond 6 MAD
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# per-pass differences (mW): 10.0 -10.0 20.0 -10.0 0.0 -10.0 5.0 10.0
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# board power while running 3136 mW; jobs/s 33332670.4; updates/s 0.0; measured PL clock 99.998 MHz
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# pre-registered prediction 4.0 mW: measured/predicted = 0.47, -0.5 sigma from it
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