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WAI on GPUs: decode-equivalence's conditions with WGSL's integer semantics suite; Media Capabilities and WebCodecs in dispatch #452

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dcharlot commented 2026-10-22 13:48:22 -04:00
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Stacked on #438 (wai/cross-fabric). Implements items 1 and 4 of the ingest list in the owner's Global Energy & Cost Map (2026-10-22): the conditions for claiming decode-equivalence on a GPU, with a cross-vendor conformance suite, and a Media Capabilities / WebCodecs mapping in dispatch.

1. decode-equivalence on a GPU

Spec — determinism-tiers §5, new subsection Claiming the tier on a GPU. A decoder may claim the tier for output its GPU computed only when every shader module that ran it:

  1. is integer only (bool, i32, u32), so no reassociation or fusion (WGSL §15.7.5) can change a result;
  2. uses no subgroup or quad operation and enables no extension (WGSL §15.5, §15.6.3);
  3. has no result that depends on scheduling (one atomic kind, its result unused) and no out-of-bounds access (WGSL §6.5.7);
  4. is translated with the translator's integer guards on, and reaches no operation the translator leaves to the hardware;
  5. passes the WGSL integer semantics vectors and the implementation's probe on that adapter before it runs a graph;
  6. names the adapter and the translator in the claim.

Item 4 is concrete. naga 30.0.1 guards signed arithmetic, division, remainder, neg and abs in MSL and HLSL, and division in SPIR-V. Its MSL and SPIR-V division guards can be turned off; the host must not do that. naga does not reduce a shift amount modulo 32 in any backend, and writes integer clamp as MSL's clamp. I read both from its source.

Kernels. Every run-time shift amount is now masked (& 31u), and the two run-time clamps are now min(max(…)). WGSL gives the same results either way, and the translated code becomes defined on every backend. The corpus, the probe and all 18 mutants still pass.

Suite — wgsl-conformance/integer.jsonl. It covers every integer operation WGSL defines on i32, u32 and vec2, at the edge cases WGSL defines at run time and MSL/HLSL/SPIR-V leave open: wrapping, x/0 = x, x%0 = 0, INT_MIN/−1 = INT_MIN, shift amounts 0–40 and past them, clamp bounds out of order, bit fields at and past the word. Each result is written from the WGSL text (CRD 2026-10-21) by semantics::reference. Discovery runs the suite after the probe and refuses an adapter that differs on a guarded case.

Rules check — tests/wgsl_rules.rs, on naga's IR. It holds every shipped module to items 1–4, including the guard helpers present in the module's MSL and HLSL translations. It also checks that every integer operation a kernel uses is one the suite runs, and that the crate creates modules only through the checked call.

Results (2026-10-22, rustc 1.98.0, wgpu/naga 30.0.1, release)

adapter (backend) semantics suite probe corpus mutants capability corpora on device
Metal, arm64 desktop, macOS 27.0.1 254,464 cases, 0 differ (also 0 on unguarded) equal 0 mismatches 18/18 9 caps, 0 differ, jpegai/v1 included
browser WebGPU on that GPU (Chromium 148, Chromium-based 155) 82,432 cases, 0 differ; wasm32 reference = file (page and Node 26) — 0 mismatches — not run
Vulkan 0x10de:0x28e1 (595.84), Linux 0 differ equal 0 18/18 0 differ
Vulkan 0x8086:0xa7a0 (Mesa 25.2.8), Linux 0 differ equal 0 18/18 0 differ
Vulkan llvmpipe (software), Linux 0 differ equal 0 18/18 0 differ
Vulkan 0x10de:0x1f15 (591.74), Windows 0 differ equal 0 18/18 0 differ
Vulkan 0x8086:0x9a49, Windows 0 differ equal 0 18/18 0 differ
DX12 (HLSL, SM 5.1) 0x10de:0x1f15 (32.0.15.9174) 0 differ equal 0 18/18 0 differ
DX12 (HLSL, SM 5.1) 0x8086:0x9a49 (31.0.101.3222) 0 differ equal 0 18/18 0 differ
DX12 software adapter 0x1414 0 differ equal 0 18/18 0 differ

The 0x1002:0x1586 adapter passed on the previous kernel text, but its host needs an interactive login. It has not run the suite, so this revision no longer claims it.

4. Platform decode in dispatch

Spec — new extension extensions/platform-decode.md, with pointers from SPEC §4 and §7.1.

  • The query is read from the payload, never from what an encoder declared. For AV1 it is the AV1-ISOBMFF codec string (in full when the stream is not 4:2:0 BT.709 studio range). For HEVC it is the Annex E.3 string, with the cropped and coded sizes, taken from the SPS.
  • supported: false makes the capability unsupported for that object (missing_capability).
  • smooth and powerEfficient order the entries and nothing else. They are never written as energy.
  • prefer-hardware is treated as a hint, not as evidence of hardware.
  • The default order is a SPEC §7.1 deployer policy:
    1. power-efficient classical decode, and learned decode with a qualifying budget;
    2. smooth classical decode;
    3. any other classical decode;
    4. learned decode without a budget.
  • WAI1 rule: a learned capability without a budget is not advertised when its fallback is a power-efficient classical decode.
  • The budget is read from energy-measurement as the energy agent defines it: an OnChipCounter figure measured on a reference sink, non-zero, with uncertainty and window. I made no change to energy-measurement.md.

Reference — wai::platform_decode, pure logic. Vectors — platform-decode-conformance/.

Browser — wai-web, platform_decode feature, its own bundle, so the main bundle is unchanged. In Chromium 148 and the Chromium-based 155 on an arm64 desktop:

  • AV1 floors. All 48 AV1 floor objects of the packaging corpus decoded every temporal unit through WebCodecs with the derived configuration. At 64×36 the platform reported smooth but not power-efficient and refused prefer-hardware; at 1920×1080 it reported power-efficient and accepted prefer-hardware.
  • HEVC. The platform's own HEVC encoder was configured hvc1.1.6.L93.B0 and declared that string for its output. The SPS it wrote says general_level_idc 63. The derived hev1.1.6.L63.B0 was accepted and decoded every picture back.
  • Order. From the live answers, AV1 was picked over a learned entry without a budget, and the learned entry was picked once it carried a qualifying budget.

Falsifications (each shown to fail)

  • Semantics suite: a hand-written remainder a − (a/b)·b is refused at discovery on every native adapter.
  • Committed vectors: held byte for byte to the reference; a round-trip test covers the file format.
  • Rules check: 9 planted violations, each refused by its rule: float, f16, subgroup, atomicAdd, an atomic result that is read, workgroup memory with a barrier, an unmasked shift, a run-time clamp, a float built-in. Unmasking one shift in arith.wgsl is also refused.
  • Dispatch order: each rule turned off (learned below classical, unsupported is unsupported, budget must qualify) is caught by a named vector.
  • Queries: the AV1-ISOBMFF examples reproduce exactly, and every corpus floor matches the codec string and size in its HLS master. The hardware-encoder SPS vector catches anyone who echoes the declared codec string instead of deriving it.

Not verified

  • The AMD adapter (see above).
  • Any WebGPU engine but Chromium's.
  • The browser leg of the capability corpora.
  • A platform without hardware AV1 or HEVC decode, and a platform that fakes its Media Capabilities answers.
  • ISO/IEC 14496-15 itself: the HEVC string form is checked against Chromium's open-source parser and a real decode, not the ISO text.
  • No forge run of wai-ops-gpu.yml with these changes yet.

For review

  • Workflow. wai-ops-gpu.yml (Forgejo) is updated: the test count goes from 6 to 16, it requires the new report lines, and it runs a Node wasm32 reference step. No GitHub workflow is touched.

  • Packages. Every existing package keeps its bytes. Nothing in wai-pack or the packaging corpus changed, and the lockfiles are current.

  • Status page. The site rows are on the website repo, branch status/wai-gpu-int-tier, not merged:

    • envelope-tiers now states what main already claims;
    • two Building items: envelope-tiers-gpu and envelope-dispatch-platform;
    • references rows for WGSL, WebCodecs and Media Capabilities.

    That branch's build, public-text check and the /status/ + /references/ e2e pass.

  • Do not merge before #438.

🤖 Generated with Claude Code

Closed: Landed in main through #465 (the packaging train): its content was squashed onto main as 836d0255d with #426, #438 and #452 together, then the review fixes on top; #465 merged as dc0d5ca5. Of the files this PR changed, all but the ones the stacked PRs share or the review changed are byte-identical on main.

Stacked on #438 (`wai/cross-fabric`). Implements items 1 and 4 of the ingest list in the owner's *Global Energy & Cost Map* (2026-10-22): the conditions for claiming `decode-equivalence` on a GPU, with a cross-vendor conformance suite, and a Media Capabilities / WebCodecs mapping in dispatch. ## 1. `decode-equivalence` on a GPU **Spec** — determinism-tiers §5, new subsection *Claiming the tier on a GPU*. A decoder may claim the tier for output its GPU computed only when every shader module that ran it: 1. is integer only (bool, i32, u32), so no reassociation or fusion (WGSL §15.7.5) can change a result; 2. uses no subgroup or quad operation and enables no extension (WGSL §15.5, §15.6.3); 3. has no result that depends on scheduling (one atomic kind, its result unused) and no out-of-bounds access (WGSL §6.5.7); 4. is translated with the translator's integer guards on, and reaches no operation the translator leaves to the hardware; 5. passes the WGSL integer semantics vectors and the implementation's probe on that adapter before it runs a graph; 6. names the adapter and the translator in the claim. Item 4 is concrete. naga 30.0.1 guards signed arithmetic, division, remainder, `neg` and `abs` in MSL and HLSL, and division in SPIR-V. Its MSL and SPIR-V division guards can be turned off; the host must not do that. **naga does not reduce a shift amount modulo 32 in any backend, and writes integer `clamp` as MSL's `clamp`.** I read both from its source. **Kernels.** Every run-time shift amount is now masked (`& 31u`), and the two run-time clamps are now `min(max(…))`. WGSL gives the same results either way, and the translated code becomes defined on every backend. The corpus, the probe and all 18 mutants still pass. **Suite** — `wgsl-conformance/integer.jsonl`. It covers every integer operation WGSL defines on i32, u32 and vec2, at the edge cases WGSL defines at run time and MSL/HLSL/SPIR-V leave open: wrapping, `x/0 = x`, `x%0 = 0`, `INT_MIN/−1 = INT_MIN`, shift amounts 0–40 and past them, clamp bounds out of order, bit fields at and past the word. Each result is written from the WGSL text (CRD 2026-10-21) by `semantics::reference`. Discovery runs the suite after the probe and refuses an adapter that differs on a guarded case. **Rules check** — `tests/wgsl_rules.rs`, on naga's IR. It holds every shipped module to items 1–4, including the guard helpers present in the module's MSL and HLSL translations. It also checks that every integer operation a kernel uses is one the suite runs, and that the crate creates modules only through the checked call. ### Results (2026-10-22, rustc 1.98.0, wgpu/naga 30.0.1, release) | adapter (backend) | semantics suite | probe | corpus | mutants | capability corpora on device | |---|---|---|---|---|---| | Metal, arm64 desktop, macOS 27.0.1 | 254,464 cases, 0 differ (also 0 on unguarded) | equal | 0 mismatches | 18/18 | 9 caps, 0 differ, jpegai/v1 included | | browser WebGPU on that GPU (Chromium 148, Chromium-based 155) | 82,432 cases, 0 differ; wasm32 reference = file (page and Node 26) | — | 0 mismatches | — | not run | | Vulkan 0x10de:0x28e1 (595.84), Linux | 0 differ | equal | 0 | 18/18 | 0 differ | | Vulkan 0x8086:0xa7a0 (Mesa 25.2.8), Linux | 0 differ | equal | 0 | 18/18 | 0 differ | | Vulkan llvmpipe (software), Linux | 0 differ | equal | 0 | 18/18 | 0 differ | | Vulkan 0x10de:0x1f15 (591.74), Windows | 0 differ | equal | 0 | 18/18 | 0 differ | | Vulkan 0x8086:0x9a49, Windows | 0 differ | equal | 0 | 18/18 | 0 differ | | DX12 (HLSL, SM 5.1) 0x10de:0x1f15 (32.0.15.9174) | 0 differ | equal | 0 | 18/18 | 0 differ | | DX12 (HLSL, SM 5.1) 0x8086:0x9a49 (31.0.101.3222) | 0 differ | equal | 0 | 18/18 | 0 differ | | DX12 software adapter 0x1414 | 0 differ | equal | 0 | 18/18 | 0 differ | The 0x1002:0x1586 adapter passed on the previous kernel text, but its host needs an interactive login. It has not run the suite, so this revision no longer claims it. ## 4. Platform decode in dispatch **Spec** — new extension `extensions/platform-decode.md`, with pointers from SPEC §4 and §7.1. - **The query** is read from the payload, never from what an encoder declared. For AV1 it is the AV1-ISOBMFF codec string (in full when the stream is not 4:2:0 BT.709 studio range). For HEVC it is the Annex E.3 string, with the cropped and coded sizes, taken from the SPS. - **`supported: false`** makes the capability unsupported for that object (`missing_capability`). - **`smooth` and `powerEfficient`** order the entries and nothing else. They are never written as energy. - **`prefer-hardware`** is treated as a hint, not as evidence of hardware. - **The default order** is a SPEC §7.1 deployer policy: 1. power-efficient classical decode, and learned decode with a qualifying budget; 2. smooth classical decode; 3. any other classical decode; 4. learned decode without a budget. - **WAI1 rule:** a learned capability without a budget is not advertised when its fallback is a power-efficient classical decode. - **The budget** is read from energy-measurement as the energy agent defines it: an `OnChipCounter` figure measured on a reference sink, non-zero, with uncertainty and window. I made no change to energy-measurement.md. **Reference** — `wai::platform_decode`, pure logic. **Vectors** — `platform-decode-conformance/`. **Browser** — `wai-web`, `platform_decode` feature, its own bundle, so the main bundle is unchanged. In Chromium 148 and the Chromium-based 155 on an arm64 desktop: - **AV1 floors.** All 48 AV1 floor objects of the packaging corpus decoded every temporal unit through WebCodecs with the derived configuration. At 64×36 the platform reported smooth but not power-efficient and refused `prefer-hardware`; at 1920×1080 it reported power-efficient and accepted `prefer-hardware`. - **HEVC.** The platform's own HEVC encoder was configured `hvc1.1.6.L93.B0` and declared that string for its output. The SPS it wrote says `general_level_idc` 63. The derived `hev1.1.6.L63.B0` was accepted and decoded every picture back. - **Order.** From the live answers, AV1 was picked over a learned entry without a budget, and the learned entry was picked once it carried a qualifying budget. ## Falsifications (each shown to fail) - **Semantics suite:** a hand-written remainder `a − (a/b)·b` is refused at discovery on every native adapter. - **Committed vectors:** held byte for byte to the reference; a round-trip test covers the file format. - **Rules check:** 9 planted violations, each refused by its rule: float, f16, subgroup, `atomicAdd`, an atomic result that is read, workgroup memory with a barrier, an unmasked shift, a run-time clamp, a float built-in. Unmasking one shift in arith.wgsl is also refused. - **Dispatch order:** each rule turned off (learned below classical, unsupported is unsupported, budget must qualify) is caught by a named vector. - **Queries:** the AV1-ISOBMFF examples reproduce exactly, and every corpus floor matches the codec string and size in its HLS master. The hardware-encoder SPS vector catches anyone who echoes the declared codec string instead of deriving it. ## Not verified - The AMD adapter (see above). - Any WebGPU engine but Chromium's. - The browser leg of the capability corpora. - A platform without hardware AV1 or HEVC decode, and a platform that fakes its Media Capabilities answers. - ISO/IEC 14496-15 itself: the HEVC string form is checked against Chromium's open-source parser and a real decode, not the ISO text. - No forge run of `wai-ops-gpu.yml` with these changes yet. ## For review - **Workflow.** `wai-ops-gpu.yml` (Forgejo) is updated: the test count goes from 6 to 16, it requires the new report lines, and it runs a Node wasm32 reference step. No GitHub workflow is touched. - **Packages.** Every existing package keeps its bytes. Nothing in wai-pack or the packaging corpus changed, and the lockfiles are current. - **Status page.** The site rows are on the website repo, branch `status/wai-gpu-int-tier`, not merged: - `envelope-tiers` now states what main already claims; - two Building items: `envelope-tiers-gpu` and `envelope-dispatch-platform`; - references rows for WGSL, WebCodecs and Media Capabilities. That branch's build, public-text check and the `/status/` + `/references/` e2e pass. - Do not merge before #438. 🤖 Generated with [Claude Code](https://claude.com/claude-code) --- **Closed:** Landed in main through #465 (the packaging train): its content was squashed onto main as 836d0255d with #426, #438 and #452 together, then the review fixes on top; #465 merged as dc0d5ca5. Of the files this PR changed, all but the ones the stacked PRs share or the review changed are byte-identical on main. 
A suite of every integer operation WGSL defines on i32, u32 and their
two-component vectors, at the run-time cases MSL, HLSL and SPIR-V leave
open: wrapping arithmetic and negation, division and remainder by zero and
of the most negative i32 by -1, shift amounts 0..40 and past them, clamp
bounds in and out of order, bit fields at and past the word. Each result is
written from the WGSL text (semantics::reference), never from a shader.

Discovery runs it after the arithmetic probe and refuses an adapter that
differs on a guarded case. The cases no kernel reaches (a shift of 32 or
more, clamp bounds out of order) are marked unguarded: reported, not
deciding. wgsl-conformance/integer.jsonl holds the edge cases, written by
wai-wgsl-vectors; tests/semantics.rs holds the file to the reference, runs
it and SplitMix64 cases on every adapter, and shows a remainder written by
hand refused at discovery.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
naga 30.0.1 passes a shift amount to MSL, HLSL and SPIR-V without reducing
it modulo 32, and writes an integer clamp as MSL's clamp, which leaves
bounds out of order undefined. The kernels already handled every shift of
32 or more explicitly and load refuses lo > hi; masking each run-time
amount with & 31u and writing the two run-time clamps as min(max(e, lo),
hi) gives WGSL's result unchanged and makes the translated code defined on
every backend. The clamp mutant follows its text.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
tests/wgsl_rules.rs parses every shipped module with naga 30.0.1 and
validates it with no capability, then holds it to determinism-tiers §5's
GPU conditions: bool, i32 and u32 only, a closed list of expressions and
integer built-ins, one atomic kind with its result unused, no barrier or
workgroup memory, shift amounts masked below 32 and clamp bounds literal
and ordered, every integer operation one the semantics suite runs, and
naga's guards (naga_div, naga_mod, naga_neg, naga_abs, signed arithmetic
through unsigned) in each module's MSL and HLSL. It holds the crate to the
checked create_shader_module, and shows nine planted violations each
refused by the rule it breaks. naga enters as a native dev-dependency, the
release wgpu 30.0.1 already locks.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
run_semantics holds the committed vectors to the reference compiled to
wasm32 in the page and runs them, with SplitMix64 cases, on every adapter
the page is offered; semantics_reference.mjs does the first half under
Node, with no GPU. run.mjs serves wgsl-conformance and, under
WAI_OPS_GPU_REQUIRE, requires both lines.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
The conditions under which a decoder may claim the tier for output its GPU
computed, from WGSL (CRD 21 October 2026) and naga 30.0.1 as read: integer
only, so no reassociation or fusion (WGSL §15.7.5) can change a result; no
subgroup or quad operation and no extension (§15.5, §15.6.3); no result
that depends on scheduling and no out-of-bounds access (§6.5.7); the
translator's integer guards on, and no operation it leaves to the hardware
reached; the WGSL integer semantics vectors and the implementation's probe
passed first, on that adapter; the claim naming adapter and translator.

The GPU bullet lists the adapters on which this revision's kernels passed:
Metal, a browser's WebGPU, Vulkan on Linux and Windows, DX12 on Windows,
with the capability corpora decoding to the CPU's bytes on each but the
browser. The 0x1002 adapter, which passed on the previous kernel text and
has not run the suite, is no longer claimed. §6's row records the run.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
The Metal leg requires the semantics line with every guarded case equal
and the edited semantics kernel refused, and counts sixteen tests; the
browser step runs the vectors against the wasm32 reference under Node and
requires the page's semantics lines; the linux leg's absent-adapter check
covers tests/semantics.rs. wgsl-conformance is a trigger path.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
wai::platform_decode: the query a sink makes of Media Capabilities and
WebCodecs for an entry, read from its payload (AV1: the AV1-ISOBMFF codec
string from the sequence header, full where the stream is not 4:2:0
BT.709 studio range; HEVC: the Annex E.3 string, cropped and coded sizes
and bit depth from the SPS); the answers; the energy budget as read from
energy-measurement (OnChipCounter, measured, on a reference sink); and the
default order, a SPEC §7.1 deployer policy: power-efficient classical
decode and budgeted learned decode first, then smooth, then other
classical, then learned without a budget, manifest order within a rank.
select() runs §7.1 in that order; advertise_for_envelope() is the WAI1
rule. Pure logic, no feature, no dependency.

platform-decode-conformance: order.json (every rule, and the WAI1 cases)
and queries.json (packaging-corpus floors, and an SPS a hardware encoder
wrote whose level is not the one it declared). The tests also derive
every corpus floor to its HLS master's codec string and size, reproduce
the AV1-ISOBMFF examples, read SPSs with sub-layers and emulation
prevention, and catch each rule turned off.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
A new extension, from Media Capabilities (WD 18 October 2026), WebCodecs
(WD 19 October 2026) and its AV1 and HEVC registrations: the query a sink
forms from the payload, never from what an encoder declared; supported:
false making the capability unsupported for that object; smooth and
powerEfficient ordering only, never written as energy; prefer-hardware a
hint, not evidence of hardware; the default order and the WAI1 advertising
rule; the energy budget read from energy-measurement. SPEC §4 and §7.1
point to it. §6 records a browser run on an arm64 desktop.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
platformQuery and platformOrder bind wai::platform_decode behind the
platform_decode feature, built as its own bundle, so the main bundle is
unchanged. demo/platform_decode.html queries and decodes every AV1 floor
object of the packaging corpus through WebCodecs with the derived
configuration, asks about the same family at 1920x1080, encodes HEVC with
the platform's own encoder and decodes it back with the codec string read
from the stream, and orders a learned entry and an AV1 entry from the
answers; verify_platform_decode.mjs drives it in a headless browser.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
wai CHANGELOG: the GPU tier's conditions, and platform decode in dispatch
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c47a58cca0 
Co-Authored-By: Claude Opus 5.5 <[email protected]>
dcharlot closed this pull request 2026-10-26 08:45:43 -04:00
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